This thesis consists of two parts. Namely a hardware interface to the Precise Event Based Sampling facilities of the Intel Pentium 4 processor and the corresponding libraries to propagate these samples into the Jikes Research Virtual Machine by IBM.

This interface makes it possible to sample events like cache or tlb misses and get the exact location in the bytecode of the corresponding method inside the VM with all corresponding information like declaring class, references and so on. These samples may later be used for different optimizations.

The second part is a memory reordering technique at garbage collection time that uses the earlier collected samples to guide its decisions. All objects are separated into a hot and a cold space and every type gets a hotness assigned. Depending on its hotness the object is allocated in the hot or in the cold space.

The hot space then uses a copying garbage collector that orders the objects depending on the reference hotness.

Links:

Bibtex:

@MasterThesis{payermPEBS,
 author = {Mathias Payer},
 title = {Adaptive Optimization Using Hardware Performance Monitors},
 school = {ETH Zurich},
 address = {Zurich, Switzerland},
 year = {2006}
}